Google Sycamore
Error mitigation is perhaps the biggest challenge and barrier to implementing practical quantum computing in the era of noisy intermediate scale quantum (NISQ) computers. Last week, Google reported promising use of so-called “stabilizer code” on its 54-qubit Sycamore quantum processor to suppress errors. The recent work, published in Nature Communications, reduced the number of errors requiring correction 100-fold per round, reported Google researchers.

There’s a good account, written by Charles Q. Choi, posted today on IEEE Spectrum. This excerpt nicely captures the problem nicely: “In addition to building qubits that are physically less prone to mistakes, scientists hope to compensate for high error rates using stabilizer codes. This strategy distributes quantum information across many qubits in such a way that errors can be detected and corrected. A cluster of these “data qubits” can then all count as one single useful ‘logical qubit.’”

It not uncommon to hear researchers speculate that thousands (or more) physical qubits will be needed to create a single error-corrected logical qubit; not surprisingly, finding ways to efficiently suppress errors is an intense research area.

The abstract from Google paper (Exponential suppression of bit or phase errors with cyclic error correction) is a good summary of the work:

“Realizing the potential of quantum computing requires sufficiently low logical error rates. Many applications call for error rates as low as 10−15, but state-of-the-art quantum platforms typically have physical error rates near 10−3. Quantum error correction promises to bridge this divide by distributing quantum logical information across many physical qubits in such a way that errors can be detected and corrected. Errors on the encoded logical qubit state can be exponentially suppressed as the number of physical qubits grows, provided that the physical error rates are below a certain threshold and stable over the course of a computation.

“Here we implement one-dimensional repetition codes embedded in a two-dimensional grid of superconducting qubits that demonstrate exponential suppression of bit-flip or phase-flip errors, reducing logical error per round more than 100-fold when increasing the number of qubits from 5 to 21. Crucially, this error suppression is stable over 50 rounds of error correction. We also introduce a method for analyzing error correlations with high precision, allowing us to characterize error locality while performing quantum error correction. Finally, we perform error detection with a small logical qubit using the 2D surface code on the same device and show that the results from both one- and two-dimensional codes agree with numerical simulations that use a simple depolarizing error model. These experimental demonstrations provide a foundation for building a scalable fault-tolerant quantum computer with superconducting qubits.”

Quoted in the IEEE Spectrum article, Google researcher and senior author of the paper, Julian Kelly, said, “This work appears to experimentally validate the assumption that error-correction schemes can scale up as advertised.” That’s good news for the quantum computing community.

In this study, the researchers used: “a Sycamore quantum processor consisting of 54 superconducting transmon qubits and 88 tunable couplers in a 2D array. The available operational frequencies of the qubits range from 5 GHz to 7 GHz. The couplers are capable of tuning the qubit–qubit couplings between 0 MHz and 40 MHz, allowing for fast entangling gates while also mitigating unwanted stray interactions. The qubits and couplers in the Sycamore processor are fabricated using aluminium metallization and aluminium/aluminium-oxide Josephson junctions. Indium bump bonds are used to connect a chip containing control circuitry to the chip containing the qubits. The hybridized device is then wire-bonded to a superconducting circuit board and cooled below 20 mK in a dilution refrigerator.”

Link to IEEE article:

Link to Nature paper:

Source: HPC Wire | Found here...

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